Distributed by:
PA

Issued to

Philippe Arsenault

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Credential Verification

Issue date: November 4, 2026

ID: d8be4464-67df-402b-b5d2-7b77784fb7a9

Issued by

CMC Microsystems

Lowering barriers to technology adoption

Description

This back-end digital IC design course focuses on the physical implementation flow used in ASIC development. Participants will gain practical exposure to floorplanning, power planning, placement, clock tree synthesis, routing, timing closure, and signoff methodologies using industry-standard implementation tools. Developed with input from Canadian semiconductor employers and the Industry Training Advisory Group (ITAG).