This 1.5-day training will cover the following topics:

Schematic design creation and analysis of electro-optical circuits (PICs),
Generation of layout implementation from source/schematic, or vice-versa,
Layout-vs-schematic parameter and optical connectivity verification
Introduction to photonic device compact modelling methodology in Verilog-A with recent Spectre™ circuit simulator enhancements.

Material will be divided into two sessions, where day one will cover Rapid Adoption Kit demonstrations and slide presentations, followed by hands-on, document-guided, self-learning software sessions with an instructor-led Q&A session.